Discuss the phases of Instruction Cycle with flowchart. | Computer Organization & Architecture(COA)

Instruction Cycle

A program residing in the memory unit of a computer consists of a sequence of instructions. These instructions are executed by the processor by going through a cycle for each instruction.

In a basic computer, each instruction cycle consists of the following phases:

  1. Fetch instruction from memory.
  2. Decode the instruction.
  3. Read the effective address from memory.
  4. Execute the instruction

 

After the following four procedures are done, the control switches back to the first step and repeats the similar process for the next instruction. Therefore, the cycle continues until a Halt condition is met. The figure shows the phases contained in the instruction cycle.

As display in the figure, the halt condition appears when the device receive turned off, on the circumstance of unrecoverable errors, etc.

Fetch Cycle

The address instruction to be implemented is held at the program counter. The processor fetches the instruction from the memory that is pointed by the PC.

Next, the PC is incremented to display the address of the next instruction. This instruction is loaded onto the instruction register. The processor reads the instruction and executes the important procedures.

Execute Cycle

The data transfer for implementation takes place in two methods are as follows −

  • Processor-memory − The data sent from the processor to memory or from memory to processor.
  • Processor-Input/Output − The data can be transferred to or from a peripheral device by the transfer between a processor and an I/O device.

In the execute cycle, the processor implements the important operations on the information, and consistently the control calls for the modification in the sequence of data implementation. These two methods associate and complete the execute cycle.

State Diagram for Instruction Cycle

The figure provides a large aspect of the instruction cycle of a basic computer, which is in the design of a state diagram. For an instruction cycle, various states can be null, while others can be visited more than once.

  • Instruction Address Calculation − The address of the next instruction is computed. A permanent number is inserted to the address of the earlier instruction.
  • Instruction Fetch − The instruction is read from its specific memory location to the processor.
  • Instruction Operation Decoding − The instruction is interpreted and the type of operation to be implemented and the operand(s) to be used are decided.
  • Operand Address Calculation − The address of the operand is evaluated if it has a reference to an operand in memory or is applicable through the Input/Output.
  • Operand Fetch − The operand is read from the memory or the I/O.
  • Data Operation − The actual operation that the instruction contains is executed.
  • Store Operands − It can store the result acquired in the memory or transfer it to the I/O.

 

 

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