UNIT :1 :-
1) Design a simple arithmetic circuit which should implement the following operations: Assume A and B are 3 bit registers.Add : A+B, Add with Carry: A+B+1, Subtract: A+B’, Subtract with Borrow: A+B’+1, Increment A: A+1, Decrement A: A-1, Transfer A: A (4)
2) Explain how addition and subtraction of signed data is performed if a computer system uses signed magnitude representation. (7)
3) Design a digital circuit for 4-bit binary adder (3)
4) Explain 4 bit arithmetic circuit with suitable diagram. (4)
5) Explain hardware implementation of common bus system using three-State buffers. Mention assumptions if required. (4)
6) Show the contents of registers E, AC, BR, QR and SC during the process of multiplying 11111 with 10101. (7)
7) Write down RTL statements for the fetch and decode operation of basic computer. (3)
8) Define RTL. Give block diagram and timing diagram of transfer of R1 to R2 when P=1. (4)
9) Explain three state buffers. (3)
10) Construct a 4-bit adder-subtractor circuit. (4)
UNIT : 2:-
1) Enlist register reference instructions and explain any one of them in detail. (3)
2) What is combinational circuit? Explain multiplexer in detail. How many NAND gates are needed to implement 4 x 1 MUX? (4)
3) Draw the flowchart for instruction cycle and explain. (7)
4) What is addressing mode? Explain direct and indirect addressing mode with example.
5) List and explain Memory reference instructions in detail (7)
6) Explain any three register reference instruction in detail. (3)
7) State the differences between hardwired control and micro programmed control. (3)
8) List various types of addressing modes and explain any four of them. (4)
9) State differences between hardwired control unit and microprogrammed control unit. (3)
10) Write down RTL statements for the fetch and decode operation of basic computer. (3)
11) Describe BUN and BSA memory reference instructions in detail. (4)
12) What is interrupt? Describe interrupt cycle with neat diagram. (7)
13) What is the need of common bus? Draw common bus cycle. (4)
UNIT : 4 :- MICROPROGRAMMED CONTROL
1) What is address sequencing? Explain. (3)
2) Draw and explain micro program sequencer circuit with diagram. (7)
3) Write the symbolic microprogram routine for the BSA instruction. Use the microinstruction format of basic microprogrammed control unit. (7)
4) What is address sequencing? Explain. (3)
UNIT :- 6 PIPELINE AND VECTOR PROCESSING
1) Which are different pipeline conflicts. Describe. (3)
2) Write a note on arithmetic pipeline. (7)
3) Compare and contrast RISC and CISC. (4)
4) Explain delay load and delay branch with respect to RISC pipeline. (7)
5) State the major characteristics of RISC processor (4)
6) Elaborate 4-segment instruction pipeline with neat sketches. (7)
7) State the major characteristics of CISC processor (3)
8) Define pipelining. For arithmetic operation (Ai *Bi + Ci) with a stream of seven numbers (i=1 to 7). Specify a pipeline configuration to carry out this task. (4)
9) List down six major characteristics of RISC processors. (3)
10) A non-pipeline system takes to process a task. The same task can be processed in a six segment pipeline with a clock cycle of 10ns. Determine the speedup ratio of the pipeline for 100 tasks. What is the maximum speed up that can be achieved? (7)
11) List and explain major instruction pipeline conflicts. (3)
12) What is the significance of pipelining in computer architecture? Write a note on instruction pipeline. (7)
13) Describe pipeline conflicts. (4)
UNIT :- 7 : COMPUTER ARITHMETIC
1) Explain how addition and subtraction of signed data is performed if a computer system uses signed magnitude representation. (7)
2) Explain booth’s multiplication algorithm with example. (7)
3) How many AND gates and Adders will be required to multiply a 5 bit number with a 3 bit number? Also say size of adder (bits). How many bits will be there in the result? (3)
4) Explain BCD adder in brief (4)
5) Draw neat and clean flowchart for divide operation. Explain with example. (7)
6) Assume a computer system uses 5 bit (1 sign + 4 Magnitude) registers and 2’s complement representation. Perform multiplication of number 10 with the smallest number in this system using booth algorithm. Show step-by-step multiplication process. (7)
UNIT :- 8 : INPUT OUTPUT ORGANIZATIONS
1) Write a note on asynchronous data transfer. (7)
2) Explain the working of Direct Memory Access (DMA) (4)
3) Briefly explain source initiated transfer using handshaking. (3)
4) Differentiate Programmed I/O and Interrupt initiated I/O (4)
5) Explain daisy chain priority interrupt (4)
6) Explain CPU-IOP communication with diagram. (7)
7) Briefly explain DMA. (4)
8) Discuss source-initiated transfer using handshaking in asynchronous data transfer. (4)
9) Which are the different ways to transfer data to and from peripheral devices? Explain any one of them in detail. (7)
UNIT :- 10 : MULTIPROCESSORS
1) What is cache memory address mapping? Which are the different memory mapping techniques? Explain any one of them in detail. (7)
2) Write about Time-shared common bus interconnection structure. (3)
3) Write a note on interprocess communication and synchronization. (7)
4) What do you mean by cache memory? Justify the need of cache memory in computer systems. (4)
5) Discuss multistage switching network with neat diagrams. (7)
6) Elaborate cache coherence problem with its solutions. (7)
7) What is cache memory address mapping? Compare and contrast direct address mapping and set-associative address mapping. (7)
8) Explain multiport memory and crossbar switch with reference to interconnection structures in multiprocessors. (4)
9) What is cache coherence? Describe. (3)
10) A 4-way set-associative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The word length is 32 bits. The size of the physical address space is 4 GB. How many bits for the will be required for TAG field? (7)
